Integrated circuits (ICs) featuring metal oxide semiconductor (MOS) transistors fabricated at the 45 nm technology node may include fully silicided (FUSI) gates, which start with polycrystalline silicon (polysilicon) gates and react the polysilicon with a covering layer of nickel metal to form nickel silicide gates. FUSI gates offer performance advantages compared to polysilicon gates capped with silicide. Fabrication processes to produce FUSI gates are problematic, often resulting in scattered regions of unreacted polysilicon in gates. Improvement of FUSI processes and maintaining acceptable yields in IC manufacturing facilities requires accurate and economical assessment of the fraction of unreacted polysilicon gate material in an IC with FUSI gates. Commonly methods of measuring the fraction of unreacted polysilicon gate material include transmission electron microscopy (TEM). TEM has limited throughput and sample size, such that providing a statistically reliable sample is economically prohibitive.